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CHA2092b
18-32GHz Low Noise Amplifier
GaAs Monolithic Microwave IC Description
The CHA2092 is a high gain broadband threestage monolithic low noise amplifier. It is designed for a wide range of applications, from military to commercial communication systems. The backside of the chip is both RF and DC ground. This helps simplify the assembly process. Self biasing technique is implemented on chip to ease the circuit biasing. The circuit is manufactured with a P-HEMT process, 0.25m gate length, via holes through the substrate, air bridges and electron beam gate lithography. It is available in chip form.
Vds
IN
8831
OUT
Vgs1
Vgs2,3
Main Features
Broadband performances : 18-32GHz 2.5dB Noise Figure 10dBm output power ( -1dB gain comp. ) 22dB 1.0dB gain Low DC power consumption, 60mA @ 3.5V Chip size : 1.67 X 0.97 X 0.10 mm
Gain & NF ( dB )
30 25 20 15 10 5 0 15 17 19 21 23 25 27 29 31 33 35 Frequency (GHz)
Main Characteristics
Tamb. = 25C Symbol
Fop G NF P1dB Id Small signal gain Noise figure (20-32GHz) Output power at 1dB gain compression Bias current 8
Parameter
Operating frequency range
Min
18 17
Typ
22 2.5 10 60
Max
32
Unit
GHz dB
3.5
dB dBm
100
mA
ESD Protection : Electrostatic discharge sensitive device. Observe handling precautions !
Ref. : DSCHA20921233 21-August-01
1/6
Specifications subject to change without notice
United Monolithic Semiconductors S.A.S.
Route Departementale 128 - B.P.46 - 91401 Orsay Cedex France Tel. : +33 (0)1 69 33 03 08 - Fax : +33 (0)1 69 33 03 09
CHA2092b
Electrical Characteristics
Tamb = +25C, Vds = 3.5V; Ids=60mA Symbol
Fop G G Gsb Is P1dB VSWRin
18-32GHz Low Noise Amplifier
Parameter
Operating frequency range (1) Small signal gain (1) Small signal gain flatness (1) Gain flatness over 40MHz Reverse isolation (1) Output power at 1dB gain compression (3) Input VSWR (1)
Min
20 18
Typ
Max
28
Min
18 17
Typ
Max
32
Unit
GHz dB dB
22 1.5 0.5
22 2.5 0.5
dBpp dB dBm
25 8
30 10 2.5:1 2.5:1 3.0:1 3.0:1 3.5 4.5
25 8
30 10 2.5:1 2.5:1 2.5 2.5 2.5 3.5 -0.5 60 3.5:1 3.5:1 4 3.5 3.5 4.5
VSWRout Output VSWR (1) NF Vd Noise figure (2) DC Voltage 18-20GHz 20-28GHz 28-32GHz Vd Vgs1,Vgs2&3 Id Bias current (2)
2.5 3.5 -0.5 60
dB V V mA
100
100
(1)These values are representative of on-wafer measurements that are made without bonding wires at the RF ports. (2) 60 mA is the typical bias current used for on wafer measurements, with Vgs1 and Vgs2&3 connected together. For optimum noise figure, the bias current could be reduced down to 50 mA, adjusting the Vgs1 voltage. (3) Ids=90mA
Absolute Maximum Ratings
Tamb. = 25C (1) Symbol
Vd Id Vg Pin Ta Tstg Drain bias voltage Drain bias current Gate bias voltage Maximum peak input power overdrive (2) Operating temperature range Storage temperature range
Parameter
Values
5.0 120 -2.0 to +0.4 +15 -40 to +85 -55 to +155
Unit
V mA V dBm C C
(1) Operation of this device above anyone of these parameters may cause permanent damage. (2) Duration < 1s.
Ref. : DSCHA20921233 21-August-01
2/6
Specifications subject to change without notice
Route Departementale 128 , B.P.46 - 91401 ORSAY Cedex - FRANCE Tel.: +33 (0)1 69 33 03 08 - Fax : +33 (0)1 69 33 03 09
18-32GHz Low Noise Amplifier
Typical Results
Tamb=25C
CHA2092b
25,00 24,00 23,00 22,00 Gain (dB) 21,00 20,00 19,00 18,00 17,00 16,00 15,00 17,00
10,00 9,00 8,00 7,00 6,00 NF (dB) DBS21 NF 5,00 4,00 3,00 2,00 1,00 0,00 35,00
19,00
21,00
23,00
25,00
27,00
29,00
31,00
33,00
Frequency (GHz)
Gain and NF vs Frequency (Vdd=3.5V; Ids=60mA)
25
20 Vgs1=-0.36V Vgs1=-0.5V Gain (dB) 15 Vgs1=-0.6V Vgs1=-0,7V Vgs1=-0,8V 10 Vgs1=-0,9V Vgs1=-1V
5
0 20 21 22 23 24 25 Frequency (GHz) 26 27 28 29 30
Gain vs Frequency and Vgs1 (Vdd=3.5V; Vgs23=-0.3V)
25
20
Vgs=-0,7V 15 Gain (dB) Vgs=-0.6V Vgs=-0.5V Vgs=-0.4V 10 Vgs=-0.3V
5
0 20 21 22 23 24 25 26 27 28 29 30 Frequency (GHz)
Ref. : DSCHA20921233 21-August-01
3/6
Specifications subject to change without notice
Route Departementale 128 , B.P.46 - 91401 ORSAY Cedex - FRANCE Tel.: +33 (0)1 69 33 03 08 - Fax : +33 (0)1 69 33 03 09
CHA2092b
18-32GHz Low Noise Amplifier
Gain vs Frequency and Vgs123 (Vdd=3.5V)
0
-2
-4 -0,36 -6 dBS11 (dB) -0,50 -0,60 -8 -0,70 -0,80 -0,90 -10 -1,00
-12
-14
-16 20,00
21,00
22,00
23,00
24,00
25,00
26,00
27,00
28,00
29,00
30,00
Frequency (GHz)
dBS11 vs Frequency and Vgs1 (Vdd=3.5V; Vgs23=-0.3V)
120,0
100,0
80,0
Ids (mA)
60,0
40,0
20,0
-0,70 -0,65 -0,60 -0,55 -0,50 -0,45 -0,40 -0,35 -0,30
Vgs123 (V)
Ids vs Vgs123 (Vdd=3.5V)
Ref. : DSCHA20921233 21-August-01
4/6
Specifications subject to change without notice
Route Departementale 128 , B.P.46 - 91401 ORSAY Cedex - FRANCE Tel.: +33 (0)1 69 33 03 08 - Fax : +33 (0)1 69 33 03 09
18-32GHz Low Noise Amplifier
Chip Assembly and Mechanical Data
100pF
CHA2092b
To Vdd DC Drain supply feed
IN
8831
OUT
100pF To Vgs DC Gate supply feed to ajust NF.
100pF To Vgs DC Gate supply feed.
Note : Supply feed should be capacitively bypassed.
1670 +/- 10 1005
970 +/- 10
385
8831
385
325 920
Bonding pad positions.
( Chip thickness : 100m. All dimensions are in micrometers )
Ref. : DSCHA20921233 21-August-01
5/6
Specifications subject to change without notice
Route Departementale 128 , B.P.46 - 91401 ORSAY Cedex - FRANCE Tel.: +33 (0)1 69 33 03 08 - Fax : +33 (0)1 69 33 03 09
CHA2092b
Typical Bias Tuning
The circuit schematic is given below :
18-32GHz Low Noise Amplifier
Vd 1,2,3
IN
OUT
Vg 1
Vg 2,3
The three drain biases are connected altogether on chip. For typical operation, all the gate biases are connected together at the same power supply, tuned to drive a small signal operating current of 60 mA. A separate access to the gate voltages of the first stage ( Vg1 ) and the second and third stages ( Vgs2,3 ) is provided for the fine tuning of the amplifier regarding the application.
Ordering Information
Chip form : CHA2092b99F/00
Information furnished is believed to be accurate and reliable. However United Monolithic Semiconductors S.A.S. assumes no responsability for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of United Monolithic Semiconductors S.A.S.. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. United Monolithic Semiconductors S.A.S. products are not authorised for use as critical components in life support devices or systems without express written approval from United Monolithic Semiconductors S.A.S.
Ref. : DSCHA20921233 21-August-01
6/6
Specifications subject to change without notice
Route Departementale 128 , B.P.46 - 91401 ORSAY Cedex - FRANCE Tel.: +33 (0)1 69 33 03 08 - Fax : +33 (0)1 69 33 03 09

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